Counter = 178835
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Reference: Sock's GIME Reference | Sock's CPU Cycle Data Charts
* = 6309 | Immediate | Direct | Indexed | Extended | Inherent | Relative | Register | Memory | |||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
* | Mnemonic | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length |
* | BAND | 1130 | 7/6 | 4 |
BAND r,sBit,dBit,addr
Description:Logically AND Register Bit with Memory Bit [r.dstBit' <- r.dstBit AND (DPM).srcBit]
The BAND instruction logically ANDs the value of a speciï¬ed bit in either the A, B or CC registers with a speciï¬ed bit in memory. The resulting value is placed back into the register bit. None of the Condition Code ï¬ags are affected by the operation unless CC is speciï¬ed as the register, in which case only the destination bit may be affected. The usefulness of the BAND instruction is limited by the fact that only Direct Addressing is permitted.